Ieee Transactions on Very Large Scale Integrattion

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATTION VLSI SYSTEMS VOL NO DECEMBER Energy Minimization Using Multiple Supply Voltages

We present a dynamic programming technique for solving the multiple supply voltage scheduling problem in both non pipelined and functionally pipelined data paths The scheduling problem refers to the assignment of a sup ply voltage level selected from a xed and known number of voltage levels to each operation in a data ow graph so as to minimize the average energy consumption for given computati...

Ieee Transactions on Core Vlsi Ieee Transactions on Image Processing Ieee Transactions on Digital System Design Ieee Transactions on Testing Ieee Transactions on Communication Ieee Transactions on Low Power Vlsi

Investigating the Effects of Large Block Transactions and Owner-ship Nature on Non-Financial Disclosure

Having adequate, sufficient and timely information and data is very important for investors' decision making. Processing information and allocating the asset are two fundamental tasks in the securities market and the stock price is more likely to have the nature of disclosure, information effectiveness and asset allocation efficiency. Thus, in this research, the effects of large block transacti...

State of the Journal

Dimitris Gizopoulos is a professor in the Department of Informatics & Telecommunications, the National and Kapodistrian University of Athens where he leads the Computer Architecture Laboratory. His research focuses on the dependability, performance, and power efficiency of computing systems architectures built around high-performance and embedded multicore CPUs as well as GPUs. He has published...

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION ( VLSI ) SYSTEMS 1 Synthesis of Pipelined DSP

1 Synthesis of Pipelined DSP Accelerators with Dynamic Scheduling P. Schaumont, B. Vanthournout, I. Bolsens, H. De Man, Fellow, IEEE Abstract|To construct complete systems on silicon, application speci c DSP accelerators are needed to speed up the execution of high throughput DSP algorithms. In this paper, a methodology is presented to synthesize high throughput DSP functions into accelerator p...